Freescale Semiconductor /MK51D10 /SPI1 /CTAR_SLAVE

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CTAR_SLAVE

31282724232019161512118743000000000000000000000000000000000000000000 (0)CPHA0 (0)CPOL0FMSZ

CPOL=0, CPHA=0

Description

Clock and Transfer Attributes Register (In Slave Mode)

Fields

CPHA

Clock Phase

0 (0): Data is captured on the leading edge of SCK and changed on the following edge.

1 (1): Data is changed on the leading edge of SCK and captured on the following edge.

CPOL

Clock Polarity

0 (0): The inactive state value of SCK is low.

1 (1): The inactive state value of SCK is high.

FMSZ

Frame Size

Links

() ()